PROGRAM SCHEDULE
Monday, October 18
Mon, Oct 18 | Tue, Oct 19 | Interactive | Wed, Oct 20
8:00 | Registration |
9:30 | Opening Remarks |
10:00 |
Keynote Speech -Smartgrid for future green society, Takeshi Yokota, technology executive, Transmission, Distribution and Industrial System Company, Toshiba Corporation |
11:00 |
Keynote Speech - Advanced Process Control for Nano Technology Manufacturing Dr. John Kibarian, President and CEO, PDF Solutions |
12:00 | Lunch |
Room 1
13:20 |
PO-O-50: ALD-SiO2 Deposition and CD Slimming Techniques for Double Patterning and a Heater-less Batch Tool Jun Satoh, Tokyo Electron Tohoku |
13:40 |
PO-O-54: Crystalline Grain Size of Nickel-Platinum Silicide Films and Their Impact on Device Characteristics Yoshiki Yonamoto, Hitachi |
14:00 |
PO-O-103: Methods to Eliminate Pattern Collapse in Mass Production by the Resist Replacement without Changing Model-based Optical-Proximity-Correction Yoshinori Matsui, Renesas Electronics |
14:20 |
PO-O-90: Hydrogen concentration effect during RIE process for Piezo Resistor of MEMS pressure sensor shin egami, OMRON |
14:40 | Author's interview & Break |
15:00 |
PO-O-89: Improvement of gate critical dimension for 40nm node device Hiroyuki Yazawa, Renesas Electronics |
15:20 |
PO-O-32: Defect Reduction in Cu Chemical-Mechanical Polishing Thor Eusner, MIT |
15:40 |
PO-O-88: Optimizing of Process Parameter and further Step Coverage Improving regarding Copper Seed Deposition for 50nm NAND Flash Ying-Chieh Pan, Powerchip Semiconductor |
16:00 |
PO-O-74: Effective Start up Study and Factor Analysis for Lithography Process Filter Toru Umeda, Nihon Pall Ltd. |
16:20 | Author's interview & Break |
16:40 | Networking Session time |
17:30 ~ 19:30 |
Reception |
Room 2
13:20 |
MC-O-118: Apply neighborhood search on optimization heuristic for scheduling Yih-Yi Lee, TSMC |
13:40 |
MC-O-60: Input Plan Optimization System for the High Mix Low Volume Factory of the Semiconductor Manufacturing Koji Kamoda, Hitachi |
14:00 |
MC-O-79: Effective WIP Flow Estimation for Daily Fab Production Target Setting with Consideration of Variabilities Shi-Chung Chang, National Taiwan University |
14:20 |
MC-O-80: Design of Standard Modeling Process for Tool Sequencing Optimization under Given Robot Control Logics: A PVD Case Shi-Chung Chang, National Taiwan University |
14:40 | Author's interview & Break |
15:00 |
MC-O-119: Optimal Wet-Furnace Machine Allocation for Daily Fab Production Simon Ho-Ching Wang, Inotera Memories |
15:20 |
MC-O-59: Smart PM automatic control system Cheng-Sheng Chang, Rexchip Semiconductor |
15:40 |
MC-O-95: Improve Fab Performance by Using a Unique System that Support Overall Equipment Efficiency Methodology Maya Bakshi, Numonyx and Micron Technology |
16:00 |
ES-O-62: 1st LEED Certified Green Building for Existing Building Operation and Maintenance for Semiconductor Industry Tan Joo Shiuh, Intel |
16:20 | Author's interview & Break |
16:40 | Networking Session time |
17:30 ~ 19:30 |
Reception |
Room 3
Networking Session
Tuesday, October 19
Mon, Oct 18 | Tue, Oct 19 | Interactive | Wed, Oct 20
8:00 | Registration |
9:40 |
Keynote Speech - 3D-TSV Overview, Dr. Sitaram Arkalgud, Director, 3D Interconnect, SEMATECH |
10:40 |
Keynote Speech - Relentless Innovation: The Case for Agility in Semiconductor Manufacturing Thomas Sonderman, Vice President, Manufacturing Systems and Technology, GlobalFoundries |
11:40 | Lunch |
Room 1
13:00 |
PO-O-102: Advances on NiPt SALICIDE Process Optimization for 28nm CMOS Manufacturing Yiwei Chen, UMC/James Chu, FSI |
13:20 |
PO-O-24: Optimal Fabrication Process for MEMS Pressure Sensor by 8inch CMOS Tadashi Kai, OMRON |
13:40 |
PO-O-3: Process Optimization with the Dynamic Response Analysis Nobuichi Kuramochi, Toshiba |
14:00 |
PO-O-98: Effects of Surface Conditions of the Focus Ring on Etching Uniformity Ayuta Suzuki, Tokyo Electron |
14:20 | Author's interview & Break |
14:40 |
FM-O-19: High Productivity Multiple DUT CV Test for MEMS Microphone Wafer with Automatic Correction Shin Inuzuka, OMRON |
15:00 |
UC-O-113: Influence of airborne H2S on haze generation in ArF lithography Makiko Tamaoki, Toshiba |
15:20 |
UC-O-21: Outdoor Airborne Contamination Control for Semiconductor Manufacturing Process Chia-ching Wan, TSMC |
15:40 | Author's interview & Break |
Room 2
13:00 |
FD-O-53: Enhance transfer performance for high throughput tools by control scenario Yu-Jen Chen, Rexchip Semiconductor |
13:20 |
FD-O-84: Mathematical models for estimating direct tool to tool transport ratio Hiroshi Kondo, Muratec Automation Co., Ltd. |
13:40 |
MS-O-94: The Secret of Manufacturing Excellence : Lean Maintenance Tan Lin Sheng, Intel |
14:00 |
MS-O-122: European Equipment & Materials Initiative for 450mm Richard Oechsner, Fraunhofer IISB |
14:20 | Author's interview & Break |
14:40 |
PC-O-30: Focus Estimation using Scatterometry for 65/45-nm-node Hole Processes Kana Nemoto, Hitachi |
15:00 |
PC-O-97: Root cause identification in yield degradation due to nickel-silicide disconnection Masaki Kitabata, Panasonic Semiconductor Engineering Co.,Ltd. |
15:20 |
PC-O-104: Using Actual Equipment Data for Process Prediction in High-Mix Production Hirofumi Tsuchiyama, Renesas Electronics |
15:40 | Author's interview & Break |
3-min Summary Presentation for Interactive Poster Session
Mon, Oct 18 | Tue, Oct 19 | Interactive | Wed, Oct 20
16:00 ~ 17:20 |
YE-P-45: Enabling 18nm-size particle detection on Si surfaces by conventional laser scattering Akitake Tamura, Tokyo Electron |
YE-P-17: Optimization of test parameters for the thermal resistance Shigenobu Murashima, Renesas Kansai Semiconductor Co., Ltd. |
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YE-P-5: Defect Spatial Signature Analysis for Semiconductor Process Katsuki Imai, Sharp Corporation |
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YE-P-116: Potential Technologies for Next Generation Defect Inspection DILIP PATEL, ISMI |
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UC-P-58: Parallel plate wet denuder coupled ion chromatography for near real time monitoring of acids, ammonia and amines in clean room and equipments Masaki Takeuchi, The University of Tokush‚‰ma |
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UC-P-52: Effective cleaning of Si by the dry ice blasting for future dry process technology Hiromu Satoh, The University of Electro-Communications |
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PO-P-71: Ultra Thin Silicon Substrate for Next Generation Technology nodes Walter Schwarzenbach/Makoto Yoshimi, SOITEC |
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PE-P-46: Stress associated inspection system for detecting microcracks on CMP surfaces Kazufumi Sakai, National Institute of Advanced Industrial Science and Technology(AIST) |
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PE-P-96: Variable Frequency Drive using Nonresonant Ultrasonic Motor for Atomic Scale Production Yuki Soh, Kumamoto University |
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PC-P-64: Non-destructive inline evaluation method for the gate insulator in the nodes beyond the 22nm generation Yuya Nishi, Kumamoto University |
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PC-P-86: Optimizing Return On Inspection Trough Defectivity Smart Sampling Mhamed SAHNOUN, ST Microelectronics |
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PC-P-68: Application and effect verification of EES to old generation resist coater Takahiro Shimojoh, SANYO Electronics |
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PC-P-100: Bottleneck elimination of efficiency improvement in equipment engineering data use activities. Masahiro Shimbo, Selete |
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MS-P-23: Optimization of CVD ClF3 non-plasma cleaning condition with advanced endpoint detection tool Yohei Hamaguchi, Renesas Electronics |
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MS-P-69: Demand Forecasting System Using Customer Behavior to Optimize Foundry Manufacturing Rung-Shin Jina/Chien-Lin chang, TSMC |
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MC-P-38: The method of modeling of cycle time and consumable cost of batch Tool Hiroyuki Tsukahara, Panasonic Semiconductor Engineering Co.,Ltd. |
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MC-P-57: Automatic Engineering Lot Handle System Hung-Lung Lin, Rexchip Semiconductor |
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FD-P-39: Advanced Automatic Transportation on Twin-FAB by Conveyor System Chia-Cheng Kuo, Powerchip Semiconductor |
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FD-P-40: A high availability Multi-layered MCS System Chia-Yang Lin, Powerchip Semiconductor |
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ES-P-67: CMP oxide slurry recycling system implementation Jack Hsu/Chia-Ching Wan, TSMC |
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17:30 ~ 19:00 |
Poster Session&Cocktail |
Wednesday, October 20
Mon, Oct 18 | Tue, Oct 19 | Interactive | Wed, Oct 20
8:00 | Registration |
9:40 |
Keynote Speech: Technologies and trends related to Power Module, Dr. Katsumi Satoh, Senior manager, Power Device Development Department. Power Device Works. Mitsubishi Electric Corp. |
10:40 |
Keynote Speech - More-than-Moore reinvented George Liu, Director of Power/ MEMS Business Development Division, tsmc |
11:40 | Lunch |
12:50 |
Invited Speech: Perspective of CMOS Technology Tohru Mogami, Selete, Inc. |
13:40 | Break |
Room 1
13:50 |
PE-O-8: A novel electron beam-inspection technique for high-impedance contact plugs Yusuke Ominami, Hitachi High-Technologies Corporation |
14:10 |
PE-O-92: Methodology for N% Recovery post PM for aged/non-annealed SPA Oxynitride Gate without XPS referencing Sungchul Yoo/Zhiminig Jiang, KLA-Tencor |
14:30 |
YE-O-33: Direct correlation between electrical failure and Haze signal of DF (dark field) inspector Katsuhiro Fujiyoshi, Renesas Electronics |
14:50 |
YE-O-77: Self-aligned Critical Line for LSI Yield Improvement Masaaki Sugimoto, Renesas Electronics |
15:10 | Author's interview & Break |
15:30 |
YE-O-115: Yield Model for Estimation of Yield Impact of Semiconductor Manufacturing Equipment Andreas Nutsch, Fraunhofer IISB |
15:50 |
DM-O-25: Optimizing and applying a scribe VC-TEG for the short-loop monitoring of Cu-via open failures Jiro Inoue, Renesas Electronics |
16:10 |
DM-O-120: Virtual Equipment Engineering: A continuous simulation chain leveraging development of new semiconductor manufacturing equipment Matthias Koitzsch, Fraunhofer IISB |
16:30 ~ 16:50 |
Author's interview & Break |
Room 2
13:50 |
PC-O-41: Compensation of High-Speed Drift by Cu-CMP APC in Continuous Input of High-Mix Products Naoko Miyashita, Hitachi |
14:10 |
PC-O-61: Prediction of Slip Generation during Rapid Thermal Processing Nao Higuchi, Renesas Electronics |
14:30 |
PC-O-105: Advanced FD System for COC Reduction and Quality Improvement KATSUHISA SAKAI, Renesas Electronics |
14:50 |
PC-O-4: Productivity Improvement through Systematic Process Window Identification Allen Park, KLA-Tencor |
15:10 | Author's interview & Break |
15:30 |
PC-O-76: Reduction of Si residues for trench etching Kouichi Konishi, Renesas Electronics |
15:50 |
PC-O-44: Immersion Lithography Process Improvements by Wafer Edge Inspection at 300mm DRAM Manufacturing Fab Damian Chen, KLA-Tencor/Marlene Strobl/Inotera Memories |
16:10 |
PC-O-81: Analysis of Gate CD drift by EES Keiichi Harashima, Renesas Electronics |
16:30 |
PC-O-91: Optimized design of control plans based on risk exposure and resources capabilities Belgacem Bettayeb, ST Microelectronics |
16:50 ~ 17:10 |
Author's interview & Break |