PROGRAM SCHEDULE
ISSM2014 Abstracts (as of Nov 20)
Tuesday, December 2
Tue, Dec 2 | Wed, Dec 3 | Interactive
Century Room A+B
| 8:00 | Registration |
| 9:00 | Opening |
| 9:20 |
Keynote Speech "TSMC perspective on 3D packaging trend and solutions" Dr. Cliff Hou, Vice President, Research & Development / Design and Technology Platform, TSMC |
| 10:00 |
Keynote Speech "Hitachi's Social Innovation Business" Akihiko Tobe, General Manager, Social Innovation Business Project Division, Hitachi, Ltd. |
| 10:40 | Break |
| 10:50 |
Keynote Speech "Application of power semiconductors to railway field as a forerunner of finding answers of emerging issues" Prof. Tomoki Watanabe, Tokyo Institute of Technology/JR East |
| 11:40 | Lunch |
| 12:40 |
Highlight Session : Big Data Session Keynote "Issues of Big Data in Toshiba S&S Company" Akio Oka, Toshiba |
| 13:20 | Break |
Century Room A : Highlight Session : Big Data
| 13:30 |
MC-66 : Development of robot fault detection system YUSUKE MUKAE, Renesas Semiconductor Manufacturing |
| 13:50 |
PC-15 : Advanced Semiconductor Manufacturing Using Big Data Shinji Inoue, Panasonic |
| 14:10 |
PC-50 : Development of intelligent pad and application to analysis of pressure distribution on polishing pad in CMP process Jaehong Park, Nitta Haas Incorporeted |
| 14:30 | Author's Interview & Break |
| 14:50 |
PC-20 : Modeling Abnormal Apparatus by Trouble-Based FDC Hiroshi Matsushita, Toshiba |
| 15:10 |
PC-68 : Understanding and Controlling Semiconductor Manufacturing Variability: A SEMATECH Mission Satyavolu S. Papa Rao, SEMATECH |
| 15:30 | Author's Interview & Break |
| 15:50 |
PO-2 : Pattern-independent PMD layer planarization by controlling its volume before CMP Tomoyasu Kakegawa, SanDisk Limited |
| 16:10 |
PO-17 : Failure measures for W-CMP process Hiroshi Shibayama, Toshiba |
| 16:30 |
YE-69 : Measurement and Control of Nanodefects in Liquids Micheal Lercel, SEMATECH |
| 16:50 | Author's Interview & Networking Session |
| 17:10 - 19:00 |
Reception & Networking Session |
Century Room B : PO-1 & MS/MC/PE Session
| 13:30 |
PO-36 : Variability Improvement of Electrical Characteristics in MOSFETs with High-k HfON Gate Insulator by Si Surface Flattening Shun-ichiro Ohmi, Tokyo Institute of Technology |
| 13:50 |
PO-44 : Effect of Plasma Process for Sidewall SiO2 film Tatsuhiko Tanimura, Tokyo Electron |
| 14:10 |
PO-35 : Investigation of metal residue on sidewall spacer in NiPt silicide process Takashi Tonegawa, Renesas Semiconductor Manufacturing |
| 14:30 | Author's Interview & Break |
| 14:50 |
MS-24 : Measurement of vibration amplification characteristics of installed semiconductor equipment Kaori KOMODA, Taisei Corporation |
| 15:10 |
MS-23 : The Semiconductor Parts Refurbishment Operation Efficiency Optimization Kai Lun Lin, UMC |
| 15:30 | Author's Interview & Break |
| 15:50 |
MC-3 : Development of Wafer Transfer Simulator based on Cellular Automata Hiroe Watanabe, TowerJazz Panasonic Semiconductor |
| 16:10 |
MC-32 : Daily Target Setting with Inclusion of Induced Variability Yu-Ting Kao, National Taiwan University |
| 16:30 |
PE-62 : An Actinic Blank Inspection tool for EUVL HVM Hidehiro Watanabe, EUVL Infrastructure Development Center (EIDEC) |
| 16:50 | Author's Interview & Networking Session |
| 17:10 - 19:00 |
Reception & Networking Session |
Wednesday, December 3
Tue, Dec 2 | Wed, Dec 3 | Interactive
Century Room A+B
| 8:30 | Registration |
| 9:00 | Opening |
| 9:10 | ISSM Panel Discussion |
| 10:00 |
Keynote Speech "200mm Opportunities and Challenges in New Era" Leuh Fang, President, Vanguard International Semiconductor Corporation |
| 10:40 |
Highlight Session : Power Device Invited Talk "Progress in SiC Power Devices and Manufacturing Technology" Prof. Tsunenobu Kimoto, Kyoto University |
| 11:20 | Break |
| 11:30 | 3miniutes Summary presentation by Interactive Poster Speaker |
| 12:20 | Lunch |
| 13:20 |
Invited Talk "Intelligent Sampling Decision Scheme Based on the AVM System" Prof. Fan-Tien Cheng, National Cheng Kung University |
Century Room A : YE Session
| 14:10 |
YE-9 : Carrier Profiling Technology in 10 Nanometers Devices Jun Hirota, Toshiba |
| 14:30 |
YE-37 : Recoil Particle Elimination from Turbo Pump Eiichi Sugawara, Tokyo Electron Miyagi |
| 14:50 |
YE-27 : Particles Transport in Etching Chamber with Coulomb Force Masaki Ishiguro, Hitachi High-Technologies |
| 15:10 |
YE-16 : Yield Enhancement in MEMS Wafer Level Fabrication by Whole Process PLS Model Tomohiro Yoshimura, OMRON |
| 15:30 | Author's Interview & Break |
| 15:50 |
YE-57 : Impact of Root Cause" Identification of Parametric Failure by Using Equipment Data in CMOS Image Sensor" Takatoshi Yasui, TowerJazz Panasonic Semiconductor |
| 16:10 |
YE-51 : Voltage Contrast Detection for Challenge Systematic Killer Defects on Advanced High Voltage and CMOS Image Sensor Device Luke Lin, HMI (TSMC) |
| 16:30 |
YE-61 : Impact of Plasma Induced Charging from Implanter and ESC Dechuck process in wafer Fabrication Dr. Mai Zhihong, Global Foundries |
| 16:50 |
YE-40 : Scan Chain Design-Based Defect Inspection Approach for Faster Scan Chain Yield Ramp Dr. Jeffrey Lam, Global Foundries |
| 17:10 | Author's Interview & Break |
| 17:30 - 19:00 |
Poster Session & Awards |
Century Room B : PC session / PO-2 Session
| 14:10 |
PC-25 : Correlational study between SiN etch rate and plasma impedance in electron cyclotron resonance plasma etcher for advanced process control Takeshi Ohmori, Hitachi |
| 14:30 |
PC-30 : Enhancement of Virtual Metrology Performance for Plasma-Aided Processes by Using Process Plasma Monitoring Seolhye Park, Seoul National University |
| 14:50 |
PC-39 : Use of Traditional Approaches in the Three-dimensional Integrated Circuit TSV Package Failure Analysis Dr. Jeffrey Lam, Global Foundries |
| 15:10 |
PC-21 : Defect Classification Solution for 1X nm DR using an Unpatterned Wafer Inspection System Manjunath Prakash Kini , KLA-Tencor |
| 15:30 | Author's Interview & Break |
| 15:50 |
PO-12 : Optimization Method for CVD Chamber Cleaning Masayuki Takata, Toshiba |
| 16:10 |
PO-19 : Defect reduction by reducing wafer charging Tomohisa Satoh, Toshiba |
| 16:30 |
PO-42 : negative-tone imaging process and materials with EUV exposure Toru Fujimori, EUVL Infrastructure Development Center (EIDEC) |
| 16:50 |
PO-46 : A Theoretical Modeling of Rate Enhancer for Si CMP Akira Endou, FUJIMI INCORPORATED |
| 17:10 | Author's Interview & Break |
| 17:30 - 19:00 |
Poster Session & Awards |
3-min Summary Presentation by Interactive Poster Speakers
Tue, Dec 2 | Wed, Dec 3 | Interactive
Century Room A+B
| 11:30 | Introduction of 3mins summary presentation |
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MS-13 : Analytical Approach for Semiconductor Production Line Control Kohei Nyui, Shigeta Kuninobu, Toshiba |
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PE-34 : Robustness improvement of inline optical metrology system Hideaki Abe, Toshiba |
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PO-10 : Method to achieve high selectivity and precise etching uniformity control for gas phase etching system Tatsuya Suzuki, Tokyo Electron Limited (TSMC) |
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PO-48 : EUVL resist pattern formation analysis during development: in situ analysis using HS-AFM Motoharu Shichiri, EUVL Infrastructure Development Center (EIDEC) |
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YE-26 : Yield prediction method of product with a redundant circuit Hideki Yasui, Toshiba |
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YE-53 : The new method developed by the correlation method of monitoring minute particles in space Ryunosuke Arita, Kumamoto University |
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YE-70 : A Study of Photovoltaic Electrochemical and Galvanic Effect from CMP and Clean process on Semiconductor process yield Dr. Mai Zhihong, Global Foundries |
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UC-29 : Particle Reduction by Controlling Wafer Voltages in Vacuum Transfer Chamber Tomoyuki Tamura, Hitachi High-Technologies |
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UC-45 : Effective proposal for the resist outgassing test on the EUV lithography Isamu Takagi, EUVL Infrastructure Development Center (EIDEC) |
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UC-18 : Particle removal force measurement from the Si substrate by atomic force microscopy Shigeru Kawamura, Tokyo Electron |
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UC-38 : Aerosol Cleaning with liquid droplets for super fine surface on chamber parts Hidefumi Matsui, Tokyo Electron |
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PC-8 : Practical and high-speed load impedance monitoring system for anomaly detection in plasma processing Yuji Kasashima, National Institute of Advanced Industrial Science and Technology(AIST) |
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PC-63 : Performance of VM Models Based on PCR and Sensitivity Test for Oxide Etch Process in triple frequency CCP Yunchang Jang, Seoul National University |
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PC-55 : Secure Remote Connectivity and Big Data Stuart Perry, ILS Technology |